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Homework: Exercise 4a

Theory: How to Approach These

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Homework Solutions

Exercise Q1

Construct a truth table for the following:

a. (x+y)(x+z)(x′+z)(x + y)(x + z)(x' + z)

b. xyz+x(yz)′+(xyz)′xyz + x(yz)' + (xyz)'

PartDetail
AsksList all 8 input rows and the output of each expression.
Needs3 variables give 23=82^3 = 8 rows. Order: brackets, NOT, AND, OR.
Look atEach bracket or term is a helper column. (yz)′(yz)' is NOT of (y AND z)(y \text{ AND } z), not y′z′y'z'.
If it changesMore variables, more rows (4 variables give 16). Still one column per sub-expression, then the output.
Show solution ↓
Solution

How to solve

  1. Write x,y,zx, y, z for rows 0 to 7 (xx changes slowest, zz fastest).
  2. Add one column per part, for example x+yx+y, x+zx+z, x′+zx'+z.
  3. Combine: a product is 1 only if every part is 1; a sum is 1 if any part is 1.
xxyyzzpart 1part 2part 3FF
000
001
010
011
100
101
110
111

Sample answer

(a)

xxyyzzx+yx+yx+zx+zx′+zx'+z(x+y)(x+z)(x′+z)(x+y)(x+z)(x'+z)
0000010
0010110
0101010
0111111
1001100
1011111
1101100
1111111

Output 0,0,0,1,0,1,0,10, 0, 0, 1, 0, 1, 0, 1, so Σm(3,5,7)=xz+yz\Sigma m(3, 5, 7) = xz + yz.

Check by algebra:

(x+y)(x+z)(x′+z)=(x+yz)(x′+z)Distributive=xx′+xz+x′yz+yzDistributive, Idempotent=xz+yz(x′+1)Inverse, Identity=xz+yzNull, Identity\begin{aligned} (x+y)(x+z)(x'+z) &= (x + yz)(x' + z) && \text{Distributive} \\ &= xx' + xz + x'yz + yz && \text{Distributive, Idempotent} \\ &= xz + yz(x' + 1) && \text{Inverse, Identity} \\ &= xz + yz && \text{Null, Identity} \end{aligned}

(b)

xxyyzzxyzxyzyzyz(yz)′(yz)'x(yz)′x(yz)'(xyz)′(xyz)'FF
000001011
001001011
010001011
011010011
100001111
101001111
110001111
111110001

F=1F = 1 in every row (a tautology). Reason: xyz+(xyz)′=1xyz + (xyz)' = 1 (Inverse), then 1+x(yz)′=11 + x(yz)' = 1 (Null).

Watch out: (yz)′(yz)' is not y′z′y'z'. Build one helper column per bracket instead of evaluating in your head.

Exercise Q2

Show that x=xy+xy′x = xy + xy'

a. Using truth tables

b. Using Boolean identities

PartDetail
AsksProve both sides are always equal, in two ways.
NeedsEqual columns in every row; Distributive, Inverse (y+y′=1y + y' = 1), Identity (x⋅1=xx \cdot 1 = x).
Look atThe common factor xx in both terms is the hint to use the Distributive law.
If it changesAny “show that”: start from the longer side, one law per line, name each law.
Show solution ↓
Solution

How to solve

  1. (a) Make 4 rows for x,yx, y with columns y′y', xyxy, xy′xy', xy+xy′xy + xy', and compare with the xx column.
  2. (b) Factor out xx (Distributive), replace y+y′y + y' by 1 (Inverse), then drop the 1 (Identity).

Sample answer

(a)

xxyyy′y'xyxyxy′xy'xy+xy′xy + xy'
001000
010000
101011
110101

The last column 0,0,1,10, 0, 1, 1 equals the xx column in every row, so xy+xy′=xxy + xy' = x ✓.

(b)

xy+xy′=x(y+y′)Distributive=x⋅1Inverse=xIdentity\begin{aligned} xy + xy' &= x(y + y') && \text{Distributive} \\ &= x \cdot 1 && \text{Inverse} \\ &= x && \text{Identity} \end{aligned}

Watch out: name the law on every line; an unnamed step earns no credit in a proof.

Exercise Q3

Construct the XOR operator using only NAND gates.

Note: x XOR y=xy′+x′yx \text{ XOR } y = xy' + x'y

PartDetail
AsksBuild a circuit of only NAND gates whose output is x⊕yx \oplus y, and show that it works.
NeedsNAND(a,a)=a′\text{NAND}(a, a) = a'. SOP to NAND-NAND: ab+cd=((ab)′(cd)′)′ab + cd = ((ab)'(cd)')'.
Look atThe given SOP xy′+x′yxy' + x'y has two AND terms, one OR and two NOTs.
If it changesAny SOP: replace each AND and the OR by NAND, and make each complement with NAND(x,x)\text{NAND}(x, x).
Show solution ↓
Solution

How to solve

  1. Draw the circuit with ordinary NOT, AND and OR gates, straight from the formula.
  2. Replace every gate with its NAND version.
  3. Wherever two NOTs end up in a row, remove both: flipping a signal twice gives it back.
  4. Prove it with a truth table.

Step 1: the ordinary circuit. Read xy′+x′yxy' + x'y piece by piece. y′y' needs a NOT on yy, and x′x' needs a NOT on xx. xy′xy' needs an AND of xx and y′y', and x′yx'y needs an AND of x′x' and yy. The ++ needs an OR that joins the two ANDs. That makes 2 NOT, 2 AND and 1 OR.

Step 1: XOR with NOT, AND, ORxyy'x'xy'x'yxy' + x'y

Step 2: each gate made from NAND. A NAND is an AND whose answer is flipped: it outputs 0 only when both inputs are 1.

Gate we needBuilt from NANDWhy it works
NOT aaNAND(aa, aa)NAND(0, 0) = 1 and NAND(1, 1) = 0, so the output is always the opposite of the input.
aa AND bbNAND(aa, bb), then a NOTThe NAND gives the flipped AND; the NOT flips it back.
aa OR bbNOT aa and NOT bb, then NANDThe table below shows it gives OR.
aabba′a'b′b'NAND(a′a', b′b')a+ba + b
001100
011011
100111
110011

The last two columns match, so NOT both inputs and then NAND gives OR ✓. (In algebra: (a′b′)′=a+b(a'b')' = a + b by DeMorgan.)

Step 3: swap and cancel. Follow the wire from each AND gate to the OR gate:

StageGates on the path
Ordinary circuitAND → OR
Swap each gate for its NAND versionNAND → NOT → NOT → NAND
Remove the two NOTs in a rowNAND → NAND

So each AND becomes a single NAND, and the OR becomes a single NAND. The two input NOTs (x′x' and y′y') are still needed, so each becomes NAND with its inputs joined.

Sample answer

Method 1 (5 NAND gates, built from Steps 1–3):

GateInputsOutputReplaces
G1G_1xx, xxx′x'NOT xx
G2G_2yy, yyy′y'NOT yy
G3G_3xx, G2G_2(xy′)′(xy')'AND xy′xy'
G4G_4G1G_1, yy(x′y)′(x'y)'AND x′yx'y
G5G_5G3G_3, G4G_4((xy′)′(x′y)′)′=xy′+x′y\big((xy')'(x'y)'\big)' = xy' + x'yOR
Method 1: XOR from five NAND gatesxyy'x'(xy')'(x'y)'x ⊕ y

Check one row by hand, x=1x = 1, y=0y = 0 (XOR should give 1): G1=NAND(1,1)=0G_1 = \text{NAND}(1,1) = 0, G2=NAND(0,0)=1G_2 = \text{NAND}(0,0) = 1, G3=NAND(1,1)=0G_3 = \text{NAND}(1,1) = 0, G4=NAND(0,0)=1G_4 = \text{NAND}(0,0) = 1, G5=NAND(0,1)=1G_5 = \text{NAND}(0,1) = 1 ✓.

Method 2 (standard 4 NAND gates): instead of two separate inverters, use one shared gate n1=(xy)′n_1 = (xy)', which means “not both are 1”. AND-ing xx with it leaves only the case where x=1x = 1 and y=0y = 0: x(xy)′=x(x′+y′)=xx′+xy′=xy′x(xy)' = x(x' + y') = xx' + xy' = xy'. Likewise y(xy)′=x′yy(xy)' = x'y. So n2n_2 and n3n_3 below give the same outputs as G3G_3 and G4G_4, with one gate fewer.

GateInputsOutput
n1n_1xx, yy(xy)′(xy)'
n2n_2xx, n1n_1(x n1)′(x\,n_1)'
n3n_3yy, n1n_1(y n1)′(y\,n_1)'
outoutn2n_2, n3n_3(n2n3)′(n_2 n_3)'
XOR from four NAND gatesxyn1n2n3out = x ⊕ y

Algebra:

out=(n2n3)′=n2′+n3′DeMorgan=x n1+y n1Double complement=(x+y)(xy)′Distributive=(x+y)(x′+y′)DeMorgan=xy′+x′yDistributive, Inverse, Identity\begin{aligned} out &= (n_2 n_3)' = n_2' + n_3' && \text{DeMorgan} \\ &= x\,n_1 + y\,n_1 && \text{Double complement} \\ &= (x + y)(xy)' && \text{Distributive} \\ &= (x + y)(x' + y') && \text{DeMorgan} \\ &= xy' + x'y && \text{Distributive, Inverse, Identity} \end{aligned}
xxyyn1n_1n2n_2n3n_3outoutx⊕yx \oplus y
0011100
0111011
1010111
1101100

out=x⊕yout = x \oplus y in every row ✓, using four NAND gates (one 7400 chip).

Watch out: “only NAND” means no separate NOT gates; build each inverter as NAND(a,a)\text{NAND}(a, a). Always add the truth-table check.

Exercise Q4

Little Susie is trying to train her new puppy. She is trying to figure out when the puppy should get a dog biscuit as a reward. She has concluded the following:

  1. Give the puppy a biscuit if it sits and wiggles but does not bark.
  2. Give the puppy a biscuit if it barks and wiggles but does not sit.
  3. Give the puppy a biscuit if it sits but does not wiggle or bark.
  4. Give the puppy a biscuit if it sits, wiggles and barks.
  5. Don’t give the puppy a treat otherwise.

Hint: Use the following: S: Sit (0 for not sitting; 1 for sitting) W: Wiggles (0 for not wiggling; 1 for wiggling) B: Barking (0 for not barking; 1 for barking) F: Biscuit function (0, don’t give the puppy a biscuit; 1, give the puppy a biscuit)

Construct a truth table and find the minimized Boolean function to implement the logic telling Susie when to give her dog a biscuit.

PartDetail
AsksTurn the sentences into truth-table rows, then simplify FF with a K-map.
Needs“does” = 1, “does not” = 0; each rule is one minterm; K-map grouping rules (4.3).
Look atVariable order S W BS\,W\,B from the hint. Rule 5 means every other row is 0.
If it changesDifferent rules mean different F=1F = 1 rows; the method (rules, rows, K-map, expression, check) stays.
Show solution ↓
Solution

How to solve

  1. Translate each rule into SWBSWB: rule 1 = 110, rule 2 = 011, rule 3 = 100, rule 4 = 111.
  2. Fill the truth table: F=1F = 1 on those rows, 0 elsewhere. F=Σm(3,4,6,7)F = \Sigma m(3, 4, 6, 7).
  3. Put the 1s on a K-map (rows SS, columns WBWB in order 00,01,11,1000, 01, 11, 10) and make the biggest groups.
  4. Read each group, write FF, and check all 8 rows.
S\WBS \backslash WB00011110
0
1

Sample answer

SSWWBBFFRule
00005
00105
01005
01112
10013
10105
11011
11114
S\WBS \backslash WB00011110
00010
11011
  • Group A (column 11, both rows: m3, m7): W=1W = 1, B=1B = 1 constant, so WBWB.
  • Group B (bottom row, columns 00 and 10 joined by wrap-around: m4, m6): S=1S = 1, B=0B = 0 constant, so SB′SB'.
F=SB′+WBF = SB' + WB

In words: give a biscuit if the puppy sits without barking, or wiggles while barking. Check on every row: 011 gives 1, 100 gives 1, 110 gives 1, 111 gives 1; 000, 001, 010, 101 give 0 ✓.

Circuit: one inverter (B′B'), two ANDs, one OR.

Biscuit circuit F = SB' + WBSBWB'SB'WBF

Watch out: K-map columns run 00,01,11,1000, 01, 11, 10, not binary order. The left and right columns are neighbours, which is how m4 and m6 group.

Exercise Q5

Given the function: F(x,y,z)=xy′z+x′y′z+xyzF(x,y,z) = xy'z + x'y'z + xyz

a. List the truth table for F.

b. Draw the logic diagram using the original Boolean expression.

c. Simplify the expression using Boolean algebra and identities.

d. Simplify the expression using KMap.

e. List the truth table for your answer in Part d.

f. Draw the logic diagram for the simplified expression in Part d.

PartDetail
AsksThe full workflow: table, circuit, simplify two ways, check, then a smaller circuit.
NeedsMinterms: x′y′z=m1x'y'z = m_1, xy′z=m5xy'z = m_5, xyz=m7xyz = m_7. Idempotent, Distributive, Inverse, Identity; K-map rules.
Look atxy′zxy'z differs by one variable from both other terms, so it is used twice.
If it changesAny 3-variable function: write its minterms, fill the K-map, compare with algebra; (e) and (f) re-check and redraw (d).
Show solution ↓
Solution

How to solve

  1. (a) F=1F = 1 only on rows 1, 5, 7: F=Σm(1,5,7)F = \Sigma m(1, 5, 7).
  2. (b) Draw the original: 2 NOTs, three 3-input ANDs, one 3-input OR.
  3. (c) Copy xy′zxy'z (Idempotent), pair it with each other term, factor, use y+y′=1y + y' = 1 and x+x′=1x + x' = 1.
  4. (d) K-map: group m1+m5m_1 + m_5 and m5+m7m_5 + m_7.
  5. (e) The table of the simple answer must equal (a). (f) Draw the smaller circuit.

Sample answer

(a)

xxyyzzxy′zxy'zx′y′zx'y'zxyzxyzFF
0000000
0010101
0100000
0110000
1000000
1011001
1100000
1110011

(b) 2 inverters, 3 three-input ANDs, 1 three-input OR (6 gates):

F = xy'z + x'y'z + xyzxyzx'y'F

(c)

F=(xy′z+x′y′z)+(xy′z+xyz)Idempotent, Associative=y′z(x+x′)+xz(y′+y)Commutative, Distributive=y′z⋅1+xz⋅1Inverse=y′z+xzIdentity\begin{aligned} F &= (xy'z + x'y'z) + (xy'z + xyz) && \text{Idempotent, Associative} \\ &= y'z(x + x') + xz(y' + y) && \text{Commutative, Distributive} \\ &= y'z \cdot 1 + xz \cdot 1 && \text{Inverse} \\ &= y'z + xz && \text{Identity} \end{aligned}

(d)

x\yzx \backslash yz00011110
00100
10110
  • Group A (column 01: m1, m5): y=0y = 0, z=1z = 1 constant, so y′zy'z.
  • Group B (bottom row, columns 01 and 11: m5, m7): x=1x = 1, z=1z = 1 constant, so xzxz.

F=xz+y′z=z(x+y′)F = xz + y'z = z(x + y'), the same as (c) ✓.

(e)

xxyyzzxzxzy′zy'zxz+y′zxz + y'z
000000
001011
010000
011000
100000
101111
110000
111101

The last column 0,1,0,0,0,1,0,10, 1, 0, 0, 0, 1, 0, 1 matches (a) ✓.

(f) 1 inverter, two 2-input ANDs, one 2-input OR (4 gates):

F = xz + y'zxzyxzy'y'zF

The factored form z(x+y′)z(x + y') needs only 3 gates: one inverter, one OR, one AND.

Watch out: a term may be used twice only after writing the Idempotent law first. Do not “cancel” terms; combine pairs that differ in exactly one variable.